288.4 ms (jones) / 139.2 ms (transport) · 36.5 ions per transport instruction · not buildable · up to 2 waveforms a cycle, 196 select bits a cycle, shims 2.1 ms at 1:100 / 0.3 ms at 1:16 · compiled 2026-11-02 with qccdc cd3efedbbc10 (qccdc compile (split rounds), then insert_cooling) · engine: the general router with split rounds (qccdc compile's fallback: an unroutable round runs in halves, the rest deferred) · gate order kept: no operation starts before an earlier one on its qubit · R10: Lean checker + tableau
Shorter still: 196 traps. The general router alone does not route it; its fallback does, by running each round it cannot route in halves and deferring the rest, still in the circuit's order: 1,694 transport cycles and 7 cools, after 1,462 s of compiling.