Goal 3: one code at a time, every architecture
For each fixed QEC code, every architecture family at every size its rules allow. Each family’s best point is in colour; every other size is grey.
About this goal
Goal 1 ranks every code and every machine together, which leaves too many dimensions free to be one question. Goal 3 fixes the code and sweeps one axis, the architecture: which family runs the code’s memory fastest, and which with the lowest logical error rate. A memory is the code’s Z memory and then its X memory on the same ions, d rounds each, so a round fails when either memory does.
Every point runs under the team’s Helios nominal noise model (qccd-noise@3, on qccd-physics@3), and where that model has no number for an architecture, under the architecture’s own time and heat from the team’s transport deck. The circles are the reference sweep: each family at every size the deck allows, compiled by its own baseline compiler, which keeps the circuit’s gate order, and judged by its own rule set, without the Lean certificate step. The diamonds are entries submitted to the official server, which ran every check on the board’s own physics. Click any point to open its page: the ions moving on the machine, the program against the circuit, the rules, and the noise model’s stim program block by block.
| family | the machine | swept |
|---|---|---|
| C2LR | Cx × Cy cells, an X-junction and two legs each, one crystal per leg; crystals move only by swap-or-stay steps, one direction bit a leg (Yb-Ba, the demonstrated diagonals) | Cx, Cy |
| WISE | Cx × Cy cells, a junction zone and h gate zones each; parallel switched swaps, one parity and one kind of operation across the chip in a step, and every layer pays for its shims | h, Cx, Cy |
| Cyclone | one ring of x traps of up to n ions, L-shaped junctions at its corners; the data stands still and the ancillas rotate in lockstep | x, n ≤ 30 |
About this code
Each family’s best, as a table
The sizes that failed, and why
The rules each submission is judged by
Every submission is judged by its own rule set, as each paper is on the Reproduce page. Each family of the reference sweep is one submission, its sizes together, and its machine’s paper gives its set: C2LR by C2LR swap-or-stay, as demonstrated; WISE by WISE's rules; Cyclone by Cyclone's rules, as the deck writes them. A submitted entry is judged by the set it declares, or by the board’s (This website's machine) when it declares none. Every rule of any of these sets is a row.
✓ the rule holds on every size; ✗ it fails, on that many sizes; ◐ it holds on some sizes and does not apply to the others; · one of its rules that does not apply to a program (why is below the table); – not one of its rules. Each rule and each set is written out on the Rules page.
What the starred families cannot show yet
- C2LR* enter and exit are the platform's reading of the deck's open S11; a merge and split around each gate are priced from the noise model, which marks that open for C2LR.
- WISE* a baseline router, not the paper's worst-case sort; no qubit rests on a junction zone, so a chip holds h, not h + 1, qubits per cell.
- Cyclone* keeps the circuit's gate order, so a round takes more than the paper's 2 rotations; cooling takes no time, as the deck's S10 assumes.
A size counts as failed when its compiler refused it or its program broke a rule.
Diamonds are submitted designs, each credited.
Diamonds are submitted designs, each credited.
Diamonds are submitted designs, each credited.
Diamonds are submitted designs, each credited.
Diamonds are submitted designs, each credited.
Diamonds are submitted designs, each credited.
Diamonds are submitted designs, each credited.
Diamonds are submitted designs, each credited.