Gadgets › RSA-2048 at d = 11
Factoring RSA-2048 at d = 11
21.56 years
of machine time for Gidney's 2025 algorithm, as FormalRV writes it, on the stationary-tile QCCD machine at code distance 11, with 19.0 million ions on 65,913 tiles and 116 CCZ factories. One prime is scheduled and checked whole -- 358 steps, 31,433.62 s, concrete; the program is that prime 21,640 times, back to back (every prime has the same schedule, so this is exact, not an estimate), plus 19.08 h of work done once (1,708 steps, concrete).
The compilation is ours, not the paper's: our floorplan, our 116 distilling factories, our corridors. Gidney's own compilation of the same program (cold yoked storage, six factories fed by magic state cultivation) is the next run; until it exists the two are not compared like for like.
Zoom as on a map -- the wheel, a double-click, + and − -- and the map draws more as it grows: the machine, then its patches, then each gadget named, then every trap and ion. Click anything for what it is; the address keeps the place and the moment, to share. The player fetches each step as the clock nears it and lets it go once the clock has passed, so the browser holds a few steps at a time, and a program's ions only once one of its gadgets is in view.
The ions
The program touches 65,913 tiles (one prime and the work done once); every trap of each holds an ion, 288 a tile (144 data traps and 144 measure traps; a patch uses 241 of them, its seams the rest):
| tiles | what they are | ions |
|---|---|---|
| 1,695 | the registers' homes: a logical qubit each | 0.49 million |
| 19,024 | inside the 116 CCZ factories | 5.48 million |
| 45,194 | bus tiles: the corridors, relays and seats the merges cross | 13.02 million |
| 65,913 | in all | 18.98 million |
The floorplan's rectangle is 111,930 tiles; the other 46,017 are never touched and are not counted. Gidney's paper machine is 897,864 qubits: a logical qubit costs it 1,352 qubits hot (d = 25) or 430 in yoked cold storage, against our 241 ions; the difference is the factories (his six are fed by magic state cultivation; ours distil, 116 at once to keep up with a 5.8 ms round) and the bus our long corridors cross. The floorplan was laid out for time, not for ions.
One prime
| part | steps | time | a step |
|---|---|---|---|
| gLoop1 | 214 | 13,920.67 s | 65.05 s |
| gLoop2 | 11 | 538.68 s | 48.97 s |
| gLoop3 | 41 | 2,132.81 s | 52.02 s |
| gLoop4 | 5 | 714.55 s | 142.91 s |
| gUnloop3 | 76 | 13,592.36 s | 178.85 s |
| gUnloop2 | 11 | 534.55 s | 48.60 s |
| the prime | 358 | 31,433.62 s |
Every program
A gadget is a translated copy of one compiled program, so these 136 programs are all the machine ever runs in a prime, and every one passes at d = 11. "Show one" takes the map to the next copy and draws its ions; a design page is the program on the studio's stage, cycle by cycle.
| program | ions | its time | copies in a prime | d = 11 | |
|---|---|---|---|---|---|
| a held patch's syndrome round | 241 | 5.822 ms | every held patch, every round | pass | Design page |
| a tile's readout in Z̄ | 121 | 0.420 ms | 67,404,833 | pass | Design page |
| a X̄X̄ merge of 2 patches face to face | 505 | 138.340 ms | 67,106,729 | pass | Design page |
| a tile's preparation in Z̄ | 121 | 0.310 ms | 66,531,552 | pass | Design page |
| a tile's readout in X̄ | 121 | 0.440 ms | 26,954,712 | pass | Design page |
| a tile's preparation in X̄ | 121 | 0.330 ms | 18,356,587 | pass | Design page |
| a Z̄Z̄ merge of 2 patches face to face | 505 | 138.340 ms | 16,681,133 | pass | Design page |
| |Ȳ> in place (Gidney's circuit) | 251 | 43.862 ms | 4,772,992 | pass | Design page |
| |T>: the corner injection's preparation | 121 | 0.345 ms | 4,474,680 | pass | Design page |
| a Z̄Z̄ merge of 3 patches through a corridor of 3 tiles | 1,560 | 138.340 ms | 298,312 | pass | Design page |
| a Z̄Z̄ merge of 3 patches through a corridor of 3 tiles | 1,558 | 138.340 ms | 298,312 | pass | Design page |
| a Z̄Z̄ merge of 3 patches through a corridor of 6 tiles | 2,352 | 138.340 ms | 298,312 | pass | Design page |
| a Z̄Z̄ merge of 3 patches through a corridor of 7 tiles | 2,614 | 138.340 ms | 298,312 | pass | |
| a Z̄Z̄ merge of 4 patches through a corridor of 6 tiles | 2,613 | 138.340 ms | 298,312 | pass | Design page |
| a Z̄Z̄ merge of 4 patches through a corridor of 7 tiles | 2,877 | 138.340 ms | 298,312 | pass | |
| a Z̄Z̄ merge of 3 patches through a corridor of 8 tiles | 2,880 | 138.340 ms | 298,312 | pass | |
| a Z̄Z̄ merge of 3 patches through a corridor of 9 tiles | 3,142 | 138.340 ms | 298,312 | pass | |
| a Z̄Z̄ merge of 4 patches through a corridor of 10 tiles | 3,671 | 138.340 ms | 298,312 | pass | |
| a Z̄Z̄ merge of 4 patches through a corridor of 11 tiles | 3,933 | 138.340 ms | 298,312 | pass | |
| a Z̄Z̄ merge of 4 patches through a corridor of 10 tiles | 3,673 | 138.340 ms | 298,312 | pass | |
| a Z̄Z̄ merge of 4 patches through a corridor of 11 tiles | 3,933 | 138.340 ms | 298,312 | pass | |
| a Z̄Z̄ merge of 5 patches through a corridor of 9 tiles | 3,668 | 138.340 ms | 298,312 | pass | |
| a Z̄Z̄ merge of 5 patches through a corridor of 9 tiles | 3,668 | 138.340 ms | 298,312 | pass | |
| a Z̄Z̄ merge of 3 patches through a corridor of 9 tiles | 3,142 | 138.340 ms | 298,312 | pass | |
| a Z̄Z̄ merge of 3 patches through a corridor of 10 tiles | 3,406 | 138.340 ms | 298,312 | pass | |
| a Z̄Z̄ merge of 4 patches through a corridor of 12 tiles | 4,197 | 138.340 ms | 298,312 | pass | |
| a Z̄Z̄ merge of 4 patches through a corridor of 11 tiles | 3,933 | 138.340 ms | 298,312 | pass | |
| a Z̄Z̄ merge of 4 patches through a corridor of 12 tiles | 4,199 | 138.340 ms | 298,312 | pass | |
| a Z̄Z̄ merge of 4 patches through a corridor of 10 tiles | 3,673 | 138.340 ms | 298,312 | pass | |
| a Z̄Z̄ merge of 5 patches through a corridor of 12 tiles | 4,462 | 138.340 ms | 298,312 | pass | |
| a Z̄Z̄ merge of 5 patches through a corridor of 13 tiles | 4,722 | 138.340 ms | 298,312 | pass | |
| a Z̄Z̄ merge of 4 patches through a corridor of 13 tiles | 4,463 | 138.340 ms | 298,312 | pass | |
| a Z̄Z̄ merge of 4 patches through a corridor of 11 tiles | 3,935 | 138.340 ms | 298,312 | pass | |
| a Z̄Z̄ merge of 5 patches through a corridor of 10 tiles | 3,934 | 138.340 ms | 298,312 | pass | |
| a Z̄Z̄ merge of 5 patches through a corridor of 11 tiles | 4,198 | 138.340 ms | 298,312 | pass | |
| a Z̄Z̄ merge of 5 patches through a corridor of 12 tiles | 4,462 | 138.340 ms | 298,312 | pass | |
| a Z̄Z̄ merge of 5 patches through a corridor of 11 tiles | 4,196 | 138.340 ms | 298,312 | pass | |
| a Z̄Z̄ merge of 6 patches through a corridor of 12 tiles | 4,723 | 138.340 ms | 298,312 | pass | |
| a Z̄Z̄ merge of 6 patches through a corridor of 13 tiles | 4,987 | 138.340 ms | 298,312 | pass | |
| H̄ (Gehér et al. 2024, on our tile) | 522 | 679.832 ms | 121,211 | pass | Design page |
| a Z̄Z̄ merge of 2 patches through a corridor of 6 tiles | 2,091 | 138.340 ms | 37,289 | pass | Design page |
| a Z̄Z̄ merge of 3 patches through a corridor of 7 tiles | 2,620 | 138.340 ms | 37,289 | pass | |
| a Z̄Z̄ merge of 3 patches through a corridor of 8 tiles | 2,880 | 138.340 ms | 37,289 | pass | |
| a Z̄Z̄ merge of 3 patches through a corridor of 6 tiles | 2,346 | 138.340 ms | 37,289 | pass | Design page |
| a Z̄Z̄ merge of 3 patches through a corridor of 3 tiles | 1,558 | 138.340 ms | 37,289 | pass | Design page |
| a Z̄Z̄ merge of 4 patches through a corridor of 9 tiles | 3,405 | 138.340 ms | 37,289 | pass | |
| a Z̄Z̄ merge of 4 patches through a corridor of 4 tiles | 2,087 | 138.340 ms | 37,289 | pass | Design page |
| a Z̄Z̄ merge of 3 patches through a corridor of 8 tiles | 2,884 | 138.340 ms | 37,289 | pass | |
| a Z̄Z̄ merge of 3 patches through a corridor of 5 tiles | 2,084 | 138.340 ms | 37,289 | pass | Design page |
| a Z̄Z̄ merge of 4 patches through a corridor of 8 tiles | 3,141 | 138.340 ms | 37,289 | pass | |
| a Z̄Z̄ merge of 4 patches through a corridor of 7 tiles | 2,877 | 138.340 ms | 37,289 | pass | |
| a Z̄Z̄ merge of 4 patches through a corridor of 8 tiles | 3,135 | 138.340 ms | 37,289 | pass | |
| a Z̄Z̄ merge of 4 patches through a corridor of 7 tiles | 2,875 | 138.340 ms | 37,289 | pass | |
| a Z̄Z̄ merge of 5 patches through a corridor of 11 tiles | 4,194 | 138.340 ms | 37,289 | pass | |
| a Z̄Z̄ merge of 5 patches through a corridor of 6 tiles | 2,874 | 138.340 ms | 37,289 | pass | |
| a Z̄Z̄ merge of 2 patches through a corridor of 3 tiles | 1,297 | 138.340 ms | 37,289 | pass | Design page |
| a X̄X̄ merge of 3 patches through a corridor of 7 tiles | 2,610 | 138.340 ms | 37,289 | pass | Design page |
| a Z̄Z̄ merge of 2 patches through a corridor of 11 tiles | 3,407 | 138.340 ms | 37,289 | pass | |
| a X̄X̄ merge of 3 patches through a corridor of 7 tiles | 2,614 | 138.340 ms | 37,289 | pass | |
| a Z̄Z̄ merge of 2 patches through a corridor of 5 tiles | 1,821 | 138.340 ms | 37,289 | pass | Design page |
| a Z̄Z̄ merge of 3 patches through a corridor of 9 tiles | 3,140 | 138.340 ms | 37,289 | pass | |
| a Z̄Z̄ merge of 2 patches through a corridor of 2 tiles | 1,033 | 138.340 ms | 14,206 | pass | Design page |
| a Z̄Z̄ merge of 2 patches through a corridor of 6 tiles | 2,081 | 138.340 ms | 13,993 | pass | Design page |
| a X̄X̄ merge of 2 patches through a corridor of 13 tiles | 3,933 | 138.340 ms | 13,521 | pass | |
| a X̄X̄ merge of 2 patches through a corridor of 12 tiles | 3,675 | 138.340 ms | 13,515 | pass | |
| a X̄X̄ merge of 3 patches through a corridor of 16 tiles | 4,992 | 138.340 ms | 13,451 | pass | |
| a X̄X̄ merge of 2 patches through a corridor of 3 tiles | 1,295 | 138.340 ms | 13,100 | pass | Design page |
| a Z̄Z̄ merge of 2 patches through a corridor of 7 tiles | 2,349 | 138.340 ms | 13,053 | pass | Design page |
| a Z̄Z̄ merge of 2 patches through a corridor of 3 tiles | 1,295 | 138.340 ms | 11,760 | pass | Design page |
| a X̄X̄ merge of 2 patches through a corridor of 5 tiles | 1,823 | 138.340 ms | 11,655 | pass | Design page |
| a X̄X̄ merge of 2 patches through a corridor of 10 tiles | 3,149 | 138.340 ms | 11,062 | pass | |
| a X̄X̄ merge of 3 patches through a corridor of 17 tiles | 5,260 | 138.340 ms | 7,934 | pass | |
| a Z̄Z̄ merge of 2 patches through a corridor of 1 tiles | 769 | 138.340 ms | 7,688 | pass | Design page |
| a X̄X̄ merge of 3 patches through a corridor of 17 tiles | 5,262 | 138.340 ms | 5,471 | pass | |
| a Z̄Z̄ merge of 2 patches through a corridor of 7 tiles | 2,355 | 138.340 ms | 5,285 | pass | Design page |
| a X̄X̄ merge of 2 patches through a corridor of 10 tiles | 3,153 | 138.340 ms | 1,487 | pass | |
| a X̄X̄ merge of 2 patches through a corridor of 12 tiles | 3,675 | 138.340 ms | 1,410 | pass | |
| a X̄X̄ merge of 2 patches through a corridor of 3 tiles | 1,295 | 138.340 ms | 1,106 | pass | Design page |
| a X̄X̄ merge of 2 patches through a corridor of 14 tiles | 4,203 | 138.340 ms | 772 | pass | |
| a X̄X̄ merge of 2 patches through a corridor of 2 tiles | 1,031 | 138.340 ms | 714 | pass | Design page |
| a X̄X̄ merge of 3 patches through a corridor of 16 tiles | 4,996 | 138.340 ms | 605 | pass | |
| a X̄X̄ merge of 2 patches through a corridor of 4 tiles | 1,559 | 138.340 ms | 478 | pass | Design page |
| a Z̄Z̄ merge of 2 patches through a corridor of 15 tiles | 4,455 | 138.340 ms | 346 | pass | |
| a Z̄Z̄ merge of 2 patches through a corridor of 7 tiles | 2,349 | 138.340 ms | 246 | pass | Design page |
| a X̄X̄ merge of 2 patches through a corridor of 14 tiles | 4,197 | 138.340 ms | 220 | pass | |
| a Z̄Z̄ merge of 2 patches through a corridor of 8 tiles | 2,615 | 138.340 ms | 202 | pass | |
| a Z̄Z̄ merge of 2 patches through a corridor of 9 tiles | 2,879 | 138.340 ms | 175 | pass | |
| a Z̄Z̄ merge of 2 patches through a corridor of 19 tiles | 5,517 | 138.340 ms | 116 | pass | |
| a X̄X̄ merge of 2 patches through a corridor of 16 tiles | 4,723 | 138.340 ms | 116 | pass | |
| a Z̄Z̄ merge of 2 patches through a corridor of 11 tiles | 3,411 | 138.340 ms | 105 | pass | |
| a X̄X̄ merge of 2 patches through a corridor of 17 tiles | 4,997 | 138.340 ms | 105 | pass | |
| a Z̄Z̄ merge of 2 patches through a corridor of 14 tiles | 4,195 | 138.340 ms | 105 | pass | |
| a Z̄Z̄ merge of 2 patches through a corridor of 2 tiles | 1,031 | 138.340 ms | 105 | pass | Design page |
| a X̄X̄ merge of 2 patches through a corridor of 16 tiles | 4,731 | 138.340 ms | 105 | pass | |
| a X̄X̄ merge of 3 patches through a corridor of 16 tiles | 4,996 | 138.340 ms | 105 | pass | |
| a X̄X̄ merge of 2 patches through a corridor of 5 tiles | 1,823 | 138.340 ms | 105 | pass | Design page |
| a Z̄Z̄ merge of 2 patches through a corridor of 14 tiles | 4,195 | 138.340 ms | 105 | pass | |
| a X̄X̄ merge of 2 patches through a corridor of 10 tiles | 3,141 | 138.340 ms | 105 | pass | |
| a X̄X̄ merge of 3 patches through a corridor of 14 tiles | 4,468 | 138.340 ms | 105 | pass | |
| a X̄X̄ merge of 2 patches through a corridor of 18 tiles | 5,265 | 138.340 ms | 70 | pass | |
| a X̄X̄ merge of 2 patches through a corridor of 14 tiles | 4,207 | 138.340 ms | 70 | pass | |
| a X̄X̄ merge of 2 patches through a corridor of 14 tiles | 4,203 | 138.340 ms | 54 | pass | |
| a X̄X̄ merge of 2 patches through a corridor of 12 tiles | 3,669 | 138.340 ms | 44 | pass | |
| a X̄X̄ merge of 2 patches through a corridor of 18 tiles | 5,257 | 138.340 ms | 39 | pass | |
| a Z̄Z̄ merge of 2 patches through a corridor of 3 tiles | 1,295 | 138.340 ms | 38 | pass | Design page |
| a X̄X̄ merge of 2 patches through a corridor of 14 tiles | 4,201 | 138.340 ms | 37 | pass | |
| a X̄X̄ merge of 2 patches through a corridor of 12 tiles | 3,671 | 138.340 ms | 36 | pass | |
| a X̄X̄ merge of 2 patches through a corridor of 14 tiles | 4,197 | 138.340 ms | 35 | pass | |
| a Z̄Z̄ merge of 2 patches through a corridor of 4 tiles | 1,557 | 138.340 ms | 22 | pass | Design page |
| a X̄X̄ merge of 2 patches through a corridor of 13 tiles | 3,941 | 138.340 ms | 16 | pass | |
| a Z̄Z̄ merge of 2 patches through a corridor of 18 tiles | 5,251 | 138.340 ms | 11 | pass | |
| a Z̄Z̄ merge of 2 patches through a corridor of 4 tiles | 1,559 | 138.340 ms | 11 | pass | Design page |
| a X̄X̄ merge of 2 patches through a corridor of 18 tiles | 5,259 | 138.340 ms | 11 | pass | |
| a Z̄Z̄ merge of 2 patches through a corridor of 6 tiles | 2,083 | 138.340 ms | 11 | pass | Design page |
| a X̄X̄ merge of 2 patches through a corridor of 16 tiles | 4,735 | 138.340 ms | 11 | pass | |
| a X̄X̄ merge of 2 patches through a corridor of 14 tiles | 4,205 | 138.340 ms | 11 | pass | |
| a X̄X̄ merge of 3 patches through a corridor of 18 tiles | 5,524 | 138.340 ms | 11 | pass | |
| a X̄X̄ merge of 3 patches through a corridor of 16 tiles | 4,994 | 138.340 ms | 11 | pass | |
| a Z̄Z̄ merge of 2 patches through a corridor of 3 tiles | 1,295 | 138.340 ms | 11 | pass | Design page |
| a X̄X̄ merge of 2 patches through a corridor of 5 tiles | 1,825 | 138.340 ms | 11 | pass | Design page |
| a Z̄Z̄ merge of 2 patches through a corridor of 2 tiles | 1,031 | 138.340 ms | 11 | pass | Design page |
| a Z̄Z̄ merge of 2 patches through a corridor of 2 tiles | 1,029 | 138.340 ms | 11 | pass | Design page |
| a X̄X̄ merge of 2 patches through a corridor of 16 tiles | 4,729 | 138.340 ms | 11 | pass | |
| a X̄X̄ merge of 3 patches through a corridor of 18 tiles | 5,528 | 138.340 ms | 11 | pass | |
| a X̄X̄ merge of 2 patches through a corridor of 16 tiles | 4,735 | 138.340 ms | 11 | pass | |
| a X̄X̄ merge of 2 patches through a corridor of 17 tiles | 4,995 | 138.340 ms | 11 | pass | |
| a X̄X̄ merge of 2 patches through a corridor of 12 tiles | 3,669 | 138.340 ms | 11 | pass | |
| a X̄X̄ merge of 2 patches through a corridor of 2 tiles | 1,031 | 138.340 ms | 11 | pass | Design page |
| a Z̄Z̄ merge of 2 patches through a corridor of 7 tiles | 2,349 | 138.340 ms | 11 | pass | Design page |
| a X̄X̄ merge of 2 patches through a corridor of 16 tiles | 4,733 | 138.340 ms | 5 | pass | |
| a Z̄Z̄ merge of 2 patches through a corridor of 7 tiles | 2,349 | 138.340 ms | 5 | pass | Design page |
| a X̄X̄ merge of 2 patches through a corridor of 13 tiles | 3,939 | 138.340 ms | 5 | pass | |
| a X̄X̄ merge of 3 patches through a corridor of 13 tiles | 4,204 | 138.340 ms | 5 | pass | |
| a X̄X̄ merge of 2 patches through a corridor of 10 tiles | 3,153 | 138.340 ms | 5 | pass | |
| a X̄X̄ merge of 2 patches through a corridor of 10 tiles | 3,153 | 138.340 ms | 3 | pass | |
| a X̄X̄ merge of 2 patches through a corridor of 10 tiles | 3,151 | 138.340 ms | 3 | pass |
What the number rests on
- Every step is a schedule of compiled programs on the floorplan, checked: no two gadgets on a tile at once, every block's instructions in program order, every guard decoded before it is read. Steps run end to end, each from the board at rest.
- Each distinct program -- 128 merges, and the H̄, the preparations, the readouts and the round a held patch runs -- is compiled for the machine at d = 11 and checked against every rule and R10.
- Every time is its compiled program's own, to the microsecond: a merge 138.340 ms (25 rounds), H̄ 679.832 ms, |Ȳ> 43.862 ms, a held patch's round 5.822 ms; a preparation is given the slowest one's time (0.345 ms) and a readout the slower basis's (0.440 ms). Decoding is taken to take one round (assumed). No gate is reordered and FormalRV's program is not changed.
- Drawn as checked: a merge's program ends by reading every data ion, the patches' too, so the check can test its result; in the run the patches go on and only the corridor is read, in the same one readout cycle. |T> is drawn and checked as its Clifford twin (the corner's T an S: the same pulses, one angle). A held patch runs its round on its own tile, off any common clock (assumed).
- Not built: the phase gradient's 32 rotations exp(iπZ/2k), k = 1 .. 32. The first three the machine could do (a frame, a |Ȳ>, a T); the 29 from k = 4 need a resource state no gadget makes yet. They run once, for seconds.